MC9328MXL ETC, MC9328MXL Datasheet - Page 14

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MC9328MXL

Manufacturer Part Number
MC9328MXL
Description
i.MX Integrated Portable System Processor
Manufacturer
ETC
Datasheet

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Specifications
14
3.6 Embedded Trace Macrocell
All registers in the ETM9 are programmed through a JTAG interface. The interface is an extension of the
ARM920T processor’s TAP controller, and is assigned scan chain 6. The scan chain consists of a 40-bit
shift register comprised of the following:
The data to be written is scanned into the 32-bit data field, the address of the register into the 7-bit address
field, and a 1 into the read/write bit.
A register is read by scanning its address into the address field and a 0 into the read/write bit. The 32-bit
data field is ignored. A read or a write takes place when the TAP controller enters the UPDATE-DR state.
The timing diagram for the ETM9 is shown in Figure 2. See Table 9 for the ETM9 timing parameters used
in Figure 2.
Ref
No.
2a
2b
1
EXTAL32k startup time
EXTAL16M input jitter (peak to peak)
EXTAL16M startup time
32-bit data field
7-bit address field
A read/write bit
Output Trace Port
(Half-Rate Clocking Mode)
Clock high time
TRACECLK
TRACECLK
CLK frequency
Clock low time
Parameter
Table 9. Trace Port Timing Diagram Parameter Table
Parameter
Table 8. 32k/16M Oscillator Signal Timing (Continued)
Figure 2. Trace Port Timing Diagram
MC9328MXL Advance Information, Rev. 5
Minimum
3a
1.3
0
3
1.8V ± 0.10V
3b
2a
Maximum
Minimum
85
TBD
4a
800
2b
Valid Data
Minimum
RMS
TBD
0
2
2
1
3.0V ± 0.30V
Valid Data
Maximum
Maximum
TBD
Freescale Semiconductor
100
4b
Unit
ms
MHz
Unit
ns
ns

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