COP8SG National Semiconductor, COP8SG Datasheet - Page 2

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COP8SG

Manufacturer Part Number
COP8SG
Description
8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory/ Two Comparators and USART
Manufacturer
National Semiconductor
Datasheet

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CPU Features
Peripheral Features
n Multi-Input Wakeup Logic
n Three 16-bit timers (T1 — T3), each with two 16-bit
n Idle Timer (T0)
n MICROWIRE/PLUS Serial Interface (SPI Compatible)
n Full Duplex USART
n Two Analog Comparators
I/O Features
n Software selectable I/O options (TRI-STATE
Block Diagram
registers supporting:
— Processor Independent PWM mode
— External Event Counter mode
— Input Capture mode
Output,Push-Pull Output, Weak Pull-Up Input, and High
Impedance Input)
(Continued)
FIGURE 1. COP8SGx Block Diagram
®
2
n Schmitt trigger inputs on ports G and L
n Eight high current outputs
n Packages: 28 SO with 24 I/O pins, 40 DIP with 36 I/O
Fully Static CMOS Design
n Low current drain (typically
n Two power saving modes: HALT and IDLE
Temperature Range
n −40˚C to +85˚C, −40˚C to +125˚C
Development Support
n Windowed packages for DIP and PLCC
n Real time emulation and full program debug offered by
pins, 44 PLCC and PQFP with 40 I/O pins
MetaLink Development System
<
4 µA)
DS101317-44

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