XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 77

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XC68HC705JJ7

Manufacturer Part Number
XC68HC705JJ7
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet

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6.4 Low-Power Modes
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
NOTE:
When switching from LPO to EPO, the user must be careful to ensure
that the EPO has been enabled and powered up long enough to stabilize
before shifting clock sources.
IRQF — External Interrupt Request Flag
IRQR — Interrupt Request Reset Bit
Four modes of operation reduce power consumption:
Figure 6-2
The IRQF flag is a clearable, read-only bit that is set when an external
interrupt request is pending. Refer to
details.
This write-only bit clears the IRQF flag bit and prevents redundant
execution of interrupt routines. Refer to
more details.
OM2
0
0
1
1
Stop mode
Wait mode
Halt mode
Data-retention mode
OM1
shows the sequence of events in stop, wait, and halt modes.
0
1
0
1
Operating Modes
Oscillator
Selected
External
Internal
Internal
Internal
Table 6-1. Oscillator Selection
Low-Power
Oscillator
Disabled
Internal
Enabled
Enabled
Enabled
(LPO)
.
Section 4. Interrupts
Section 4. Interrupts
External Pin
Oscillator
Disabled
Disabled
Enabled
Enabled
(EPO)
Advance Information
Low-Power Modes
Operating Modes
Consumption
Normal
Normal
Lowest
Lowest
Power
for more
for
77

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