AT83EC5123 ATMEL Corporation, AT83EC5123 Datasheet - Page 42

• Manufacturer Part Number: AT83EC5123
• Description: (AT8xx512x) Smart Card Reader ICs
• Manufacturer: ATMEL Corporation

Interrupt Generator
Registers
42
AT8xC5122/23
Figure 24. SCI Deactivation Sequence after a Card Extraction
There are several sources of interruption but the SCIB macro-cell issues only one inter-
rupt signal: SCIBIT.
Figure 25. SCIB Interrupt Sources
This signal is high level active. One of the sources is able to set up the INT signal and
this is the read of the Smart Card Interrupt register by the CPU that clears this signal.
If during the read of the Smart Card Interrupt register an interrupt occurs, the set of the
corresponding bit into the Smart Card Interrupt register and the set of the INT signal will
be delayed after the read access.
There are fifteen registers to control the SCIB macro-cell. They are described in Table
54 to Table 45.
Some of the register widths are greater than a byte. Despite the 8 bits access provided
by the BIU, the address mapping of this kind of register respects the following rule:
The Low significant byte register is implemented at the higher address.
This implementation makes access to these registers easier when using high level pro-
gramming language (C,C++).
Transmit buffer
copied to shift register
Output current
out of range
Complete
transmission
Output voltage
out of range
Timeout on WT
counter
Parity error
detected
Complete
reception
CCLK
CRST
CVCC
CIO
ESCPI
ICARDER
EVCARDER
ESCRI
ESCWTI
ESCTI
ESCTBI
8 Clock Cycles
SCIB IT
4202B–SCR–07/03