AT83EC5123 ATMEL Corporation, AT83EC5123 Datasheet - Page 114

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AT83EC5123

Manufacturer Part Number
AT83EC5123
Description
(AT8xx512x) Smart Card Reader ICs
Manufacturer
ATMEL Corporation
Datasheet
Registers
114
AT8xC5122/23
Timer/Counter Control Register
Table 82. TCON (S:88h)
Reset Value = 0000 0000b
Number
TF1
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
TR1
TF1
TR1
TF0
TR0
Bit
IE1
IE0
IT1
IT0
6
Timer 1 Overflow flag
Cleared by the hardware when processor vectors interrupt routine.
Set by the hardware on Timer/Counter overflow when Timer 1 register overflows.
Timer 1 Run Control bit
Clear to turn off Timer/Counter 1.
Set to turn on Timer/Counter 1.
Timer 0 Overflow flag
Cleared by the hardware when processor vectors interrupt routine.
Set by the hardware on Timer/Counter overflow when Timer 0 register overflows.
Timer 0 Run Control bit
Clear to turn off Timer/Counter 0.
Set to turn on Timer/Counter 0.
Interrupt 1 Edge flag
Cleared by the hardware when interrupt is processed if edge-triggered (see IT1).
Set by the hardware when external interrupt is detected on the INT1# pin.
Interrupt 1 Type Control bit
Clear to select low level active (level triggered) for external interrupt 1 (INT1#).
Set to select falling edge active (edge triggered) for external interrupt 1.
Interrupt 0 Edge flag
Cleared by the hardware when interrupt is processed if edge-triggered (see IT0).
Set by the hardware when external interrupt is detected on INT0# pin.
Interrupt 0 Type Control bit
Clear to select low level active (level triggered) for external interrupt 0 (INT0#).
Set to select falling edge active (edge triggered) for external interrupt 0.
TF0
5
TR0
4
IE1
3
IT1
2
IE0
1
4202B–SCR–07/03
IT0
0

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