AT83EC5123 ATMEL Corporation, AT83EC5123 Datasheet - Page 173

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AT83EC5123

Manufacturer Part Number
AT83EC5123
Description
(AT8xx512x) Smart Card Reader ICs
Manufacturer
ATMEL Corporation
Datasheet
Clock Waveforms
4202B–SCR–07/03
EXTERNAL PROGRAM MEMORY FETCH
READ CYCLE
WRITE CYCLE
PORT OPERATION
SERIAL PORT SHIFT CLOCK
MOV PORT SRC
INTERNAL
MOV DEST PORT (P1. P2. P3)
(INCLUDES INTO. INT1. TO T1)
MOV DEST P0
P2 (EXT)
TXD (MODE 0)
CLOCK
XTAL2
PSEN
ALE
WR
RD
P0
P0
P2
P0
P2
SAMPLED
DATA
STATE4
P1
FLOAT
P2
Valid in normal clock mode. In X2 mode XTAL2 must be changed to XTAL2/2.
STATE5
P1
This diagram indicates when signals are clocked internally. The time it takes the signals
to propagate to the pins, however, ranges from 25 to 125 ns. This propagation delay is
dependent on variables such as temperature and pin loading. Propagation also varies
from output to output and component. Typically though (T
WR propagation delays are approximately 50 ns. The other signals are typically 85 ns.
Propagation delays are incorporated in the AC specifications.
PCL OUT
INDICATES ADDRESS TRANSITIONS
DPL OR Rt OUT
DPL OR Rt OUT
P0 PINS SAMPLED
P2
P1, P2, P3 PINS SAMPLED
RXD SAMPLED
INDICATES DPH OR P2 SFR TO PCH TRANSITION
INDICATES DPH OR P2 SFR TO PCH TRANSITION
STATE6
P1
OLD DATA NEW DATA
P2
FLOAT
SAMPLED
DATA
STATE1
P1
P2
STATE2
P1
PCL OUT
THESE SIGNALS ARE NOT ACTIVATED DURING THE
EXECUTION OF A MOVX INSTRUCTION
DATA OUT
FLOAT
P2
SAMPLED
DATA
STATE3
P1
P2
FLOAT
P1, P2, P3 PINS SAMPLED
P0 PINS SAMPLED
SAMPLED
DATA
STATE4
P1
PCL OUT (EVEN IF PROGRAM
MEMORY IS INTERNAL)
P2
MEMORY IS EXTERNAL)
RXD SAMPLED
PCL OUT (IF PROGRAM
PCL OUT (IF PROGRAM
MEMORY IS EXTERNAL
A
STATE5
P1
PCL OUT
=25 C fully loaded) RD and
AT8xC5122/23
P2
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