F25L04UA-100PG ESMT [Elite Semiconductor Memory Technology Inc.], F25L04UA-100PG Datasheet - Page 9

• Manufacturer Part Number: F25L04UA-100PG
• Description: 3V Only 4 Mbit Serial Flash Memory
• Manufacturer: ESMT [Elite Semiconductor Memory Technology Inc.]

ESMT
Fast-Read (50 MHz ; 75 MHz; 100 MHz)
The High-Speed-Read instruction supporting up to 100 MHz is
initiated by executing an 8-bit command, 0BH, followed by
address bits [A
low for the duration of the High-Speed-Read cycle. See Figure 5
for the High-Speed-Read sequence.
Following a dummy byte (8 clocks input dummy cycle), the
High-Speed-Read instruction outputs the data starting from the
specified address location. The data output stream is continuous
Elite Semiconductor Memory Technology Inc.
Figure 5 : HIGH-SPEED-READ SEQUENCE
SCK
SO
CE
SI
MODE0
MODE3
23
-A
Note : X = Dummy Byte : 8 Clocks Input Dummy (V
0
] and a dummy byte. CE must remain active
MSB
0 1 2 3 4 5 6 7 8
0B
HIGH IMPENANCE
MSB
ADD.
15 16
ADD.
IL
23 24
or V
IH
ADD.
)
through all addresses until terminated by a low to high transition
on CE . The internal address pointer will automatically increment
until the highest memory address is reached. Once the highest
memory
automatically increment to the beginning (wrap-around) of the
address space, i.e. for 4 Mbit density, once the data from address
location 07FFFFH has been read, the next output will be from
address location 000000H.
31 32
X
MSB
39 40
address
D
N
OUT
47 48
is
N+1
D
OUT
Publication Date: Jan. 2009
Revision:
reached,
55 56
F25L04UA
N+2
D
OUT
the
63 64
1.2
D
N+3
address
OUT
71 72
D
N+4
9/25
OUT
pointer
80
will