F25L04UA-100PG ESMT [Elite Semiconductor Memory Technology Inc.], F25L04UA-100PG Datasheet - Page 8

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F25L04UA-100PG

Manufacturer Part Number
F25L04UA-100PG
Description
3V Only 4 Mbit Serial Flash Memory
Manufacturer
ESMT [Elite Semiconductor Memory Technology Inc.]
Datasheet
ESMT
Read (33 MHz)
The Read instruction supports up to 33 MHz, it outputs the data
starting from the specified address location. The data output
stream is continuous through all addresses until terminated by a
low to high transition on CE . The internal address pointer will
automatically increment until the highest memory address is
reached. Once the highest memory address is reached, the
address pointer will automatically increment to the beginning
Elite Semiconductor Memory Technology Inc.
Figure 4 : READ SEQUENCE
SCK
SO
CE
SI
MODE3
MODE1
MSB
1 2 3 4 5 6 7 8
HIGH IMPENANCE
03
MSB
ADD.
15 16
ADD.
23 24
ADD.
MSB
31 32
(wrap-around) of the address space, i.e. for 4 Mbit density, once
the data from address location 7FFFFH had been read, the next
output will be from address location 00000H.
The Read instruction is initiated by executing an 8-bit command,
03H, followed by address bits [A
low for the duration of the Read cycle. See Figure 4 for the Read
sequence.
D
N
OUT
39 40
N+1
D
OUT
47 48
N+2
D
Publication Date: Jan. 2009
Revision:
OUT
55 56
F25L04UA
23
D
N+3
-A
OUT
0
]. CE must remain active
1.2
63 64
D
N+4
OUT
70
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