A3P015-1FG144 ACTEL [Actel Corporation], A3P015-1FG144 Datasheet - Page 42

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A3P015-1FG144

Manufacturer Part Number
A3P015-1FG144
Description
ProASIC3 Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
ProASIC3 DC and Switching Characteristics
2 -2 8
The length of time an I/O can withstand I
reliability data below is based on a 3.3 V, 12 mA I/O setting, which is the worst case for this type of
analysis.
For example, at 110°C, the short current condition would have to be sustained for more than three
months to cause a reliability concern. The I/O design does not contain any short circuit protection,
but such protection would only be needed in extremely prolonged stress conditions.
Table 2-35 • Duration of Short Circuit Event before Failure
Table 2-36 • I/O Input Rise Time, Fall Time, and Related I/O Reliability
Temperature
–40°C
0°C
25°C
70°C
85°C
100°C
110°C
Input Buffer
LVTTL/LVCMOS
LVDS/B-LVDS/
M-LVDS/LVPECL
*
The maximum input rise/fall time is related to the noise induced into the input buffer trace. If the
noise is low, then the rise time and fall time of input buffers can be increased beyond the
maximum value. The longer the rise/fall times, the more susceptible the input signal is to the
board noise. Actel recommends signal integrity evaluation/characterization of the system to
ensure that there is no excessive noise coupling into input signals.
Input Rise/Fall Time (min.)
No requirement
No requirement
v1.3
OSH
/I
OSL
Input Rise/Fall Time (max.)
events depends on the junction temperature. The
Time before Failure
10 ns *
10 ns *
> 20 years
> 20 years
> 20 years
6 months
3 months
5 years
2 years
20 years (110°C)
10 years (100°C)
Reliability

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