A3P015-1FG144 ACTEL [Actel Corporation], A3P015-1FG144 Datasheet - Page 118
![no-image](/images/no-image-200.jpg)
A3P015-1FG144
Manufacturer Part Number
A3P015-1FG144
Description
ProASIC3 Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.A3P015-1FG144.pdf
(206 pages)
- Current page: 118 of 206
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ProASIC3 DC and Switching Characteristics
Part Number and Revision Date
List of Changes
2 -1 0 4
Previous Version
v1.2
(June 2008)
v1.1
(January 2008)
v1.0
(January 2008)
Part Number 51700097-002-3
Revised August 2008
The following table lists critical changes that were made in the current version of the chapter.
TJ, Maximum Junction Temperature, was changed to 100° from 110º in the
"Thermal Characteristics" section
Power Allowed has thus changed to 1.463 W from 1.951 W.
Values for the A3P015 device were added to
Current
Values for the A3P015 device were added to
Contributing to Dynamic Power Consumption in ProASIC3
removed.
Consumption in ProASIC3 Devices
The
from P
Both fall and rise values were included for t
Table 2-93 · Input DDR Propagation
Table 2-98 · A3P015 Global Resource
The typical value for Delay Increments in Programmable Delay Blocks was
changed from 160 to 200 in
Table note references were added to
Conditions
The title for
remove "as measured on quiet I/Os." Table note 1 was revised to remove
"estimated SSO density over cycles." Table note 2 was revised to remove "refers
only to overshoot/undershoot limits for simultaneous switching I/Os.
The
pertaining to input buffer power and output buffer power.
Table 2-29 · I/O Output Buffer Maximum Resistances
values for 3.3 V PCI/PCI-X.
Table 2-81 · LVDS Minimum and Maximum DC Input and Output Levels
updated.
In
column and was incorrect. It was corrected and changed to T
In
Temperature1, Maximum Operating Junction Temperature was changed from
110°C to 100°C for both commercial and industrial grades.
The
In the
FCLKIN is the input clock frequency.
In
was incorrect. It previously said T
Table 2-2 · Recommended Operating Conditions
Table 2-21 · Summary of Maximum and Minimum DC Input
Table 2-3 · Flash Programming Limits – Retention, Storage and Operating
"PLL Behavior at Brownout Condition" section
"PLL Contribution—PPLL" section
"Power per I/O Pin" section
"PLL Contribution—PPLL"
AC13
Characteristics.
Table 2-15 · Different Components Contributing to the Static Power
+ P
1
, and the order of the table notes was changed.
Table 2-4 · Overshoot and Undershoot Limits
AC14
* F
CLKOUT
Changes in Current Version (v1.3)
Table 2-106 · ProASIC3 CCC/PLL
to P
section, the following was deleted:
J
DC4
v1.3
and
is new.
and it was corrected and changed to T
was updated to include 3 additional tables
Delays.
+ P
is new.
EQ
was updated to change the P
AC13
2-2. The calculated result of Maximum
Table 2-2 · Recommended Operating
* F
Table 2-14 · Different Components
CLKOUT
1
Table 2-7 · Quiescent Supply
is new.
, T
.
DDRISUD
1
J
was listed in the symbol
was revised to include
Specification.
1
A
Devices. P
.
was modified to
and t
Levels, the note
"
PLL
DDRIHD
AC14
formula
A
.
was
was
in
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