WM8951L_07 WOLFSON [Wolfson Microelectronics plc], WM8951L_07 Datasheet - Page 34
WM8951L_07
Manufacturer Part Number
WM8951L_07
Description
Stereo ADC with Microphone Input and Clock Generator
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8951L_07.pdf
(42 pages)
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WM8951L
REGISTER MAP
Table 23 Mapping of Program Registers
w
REGISTER
R0 (00h)
Left Line In
R1 (01h)
Right Line In
R2 (02h)
Reserved
R3 (03h)
Reserved
R4 (04h)
Analogue Audio
Path Control
R5 (05h)
Digital Audio
Path Control
R6 (06h)
Power Down
Control
R7 (07h)
Digital Audio
Interface Format
R8 (08h)
Sampling
Control
R9 (09h)
Active Control
R15 (0Fh)
Reset
LRINBOTH
RLINBOTH
BIT[8]
0
0
0
0
0
0
POWEROFF
CLKODIV2
RINMUTE
LINMUTE
BCLKINV
BIT[7]
The complete register map is shown in Table 23. The detailed description can be found in Table 24
and in the relevant text of the device description. There are 11 registers with 16 bits per register (7 bit
address + 9 bits of data). These can be controlled using either the 2 wire or 3 wire MPU interface.
0
0
00
CLKOUTPD
CLKIDIV2
BIT[6]
MS
0
0
0
0
LRSWAP
OSCPD
BIT[5]
0
0
0
0
0
Reserved[8:0]
Reserved[8:0]
RESET[8:0]
BIT[4]
LRP
0
0
1
0
SR[3:0]
BIT[3]
0
0
1
0
IWL[1:0]
RINVOL[4:0]
LINVOL[4:0]
ADCPD
BIT[2]
INSEL
0
00
MUTEMIC
MICPD
BIT[1]
BOSR
0
FORMAT[1:0]
PD Rev 4.1 December 2007
MICBOOST
LINEINPD
ADCHPD
NORMAL
BIT[0]
Active
USB/
Production Data
0_1001_0111
0_1001_0111
0_0000_0101
0_0000_0000
0_1001_1111
0_0000_1010
0_0000_0000
0_0000_0000
DEFAULT
Reserved
Reserved
not reset
34
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