WM8951L_07 WOLFSON [Wolfson Microelectronics plc], WM8951L_07 Datasheet - Page 28

no-image

WM8951L_07

Manufacturer Part Number
WM8951L_07
Description
Stereo ADC with Microphone Input and Clock Generator
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
WM8951L
w
The exact sample rates achieved are defined by the relationships in Table 13 below.
128/192fs NORMAL MODE
The Normal Mode sample rates are designed for standard 256fs and 384fs MCLK rates. However the
WM8951L is also capable of being clocked from a 128 or 192fs MCLK for application over limited
sampling rates as shown in the table below.
Table 14 128fs Normal Mode Sample Rate Look-up Table
512/768fs NORMAL MODE
512 fs and 768 fs MCLK rates can be accommodated by using the CLKIDIV2 bit (Register 8, bit 6).
The core clock to the DSP will be divided by 2 so an external 512/768 fs MCLK will become 256/384
fs internally and the device otherwise operates as in Table 10 but with MCLK at twice the specified
rate. See Table 7 for software control.
Table 13 Normal Mode Actual Sample Rates
SAMPLING
TARGET
SAMPLING
RATE
kHz
44.1
88.2
32
48
96
RATE
8
44.1
kHz
48
(12.288MHz/256) x 1/6
(12.288MHz/256) x 2/3
(12.288MHz/256) x 2
MCLK=12.288
not available
not available
12.288MHz/256
FREQUENCY
kHz
5.6448
8.4672
32
48
96
MCLK
6.144
9.216
8
MHz
BOSR=0
BOSR
(11.2896MHz/256) x 2/11
(11.2896MHz/256) x 2
MCLK=11.2896
0
1
0
1
not available
11.2896MHz/256
not available
not available
8.018
44.1
88.2
ACTUAL SAMPLING RATE
kHz
SR3
REGISTER SETTINGS
0
0
1
1
SAMPLE
RATE
SR2
1
1
1
1
(18.432MHz/384) x 1/6
(18.432MHz/384) x 2/3
(18.432MHz/384) x 2
MCLK=18.432
not available
not available
18.432MHz/384
SR1
kHz
32
48
96
1
1
1
1
8
PD Rev 4.1 December 2007
BOSR=1
SR0
1
1
1
1
Production Data
(16.9344MHz/384) x 2/11
(16.9344MHz /384) x 2
MCLK=16.9344
16.9344MHz /384
not available
not available
not available
DIGITAL
FILTER
TYPE
8.018
44.1
88.2
kHz
2
2
28

Related parts for WM8951L_07