XR16C854CV EXAR [Exar Corporation], XR16C854CV Datasheet - Page 53

• Manufacturer Part Number: XR16C854CV
• Description: 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

xr
REV. 3.0.1
GENERAL DESCRIPTION................................................................................................. 1
PIN DESCRIPTIONS ......................................................................................................... 4
1.0 PRODUCT DESCRIPTION .................................................................................................................... 9
2.0 FUNCTIONAL DESCRIPTIONS .......................................................................................................... 10
3.0 UART INTERNAL REGISTERS ........................................................................................................... 23
4.0 INTERNAL REGISTER DESCRIPTIONS ............................................................................................ 26
F
A
ORDERING INFORMATION
EATURES
PPLICATIONS
2.1 CPU INTERFACE ........................................................................................................................................... 10
2.2 5-VOLT TOLERANT INPUTS ......................................................................................................................... 11
2.3 DEVICE RESET .............................................................................................................................................. 11
2.4 DEVICE IDENTIFICATION AND REVISION .................................................................................................. 11
2.5 CHANNEL SELECTION ................................................................................................................................. 11
2.6 CHANNELS A-D INTERNAL REGISTERS .................................................................................................... 12
2.7 INT OUPUTS FOR CHANNELS A-D .............................................................................................................. 12
2.8 DMA MODE .................................................................................................................................................... 12
2.9 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT ........................................................................... 13
2.10 PROGRAMMABLE BAUD RATE GENERATOR ......................................................................................... 13
2.11 TRANSMITTER ............................................................................................................................................. 14
2.12 RECEIVER .................................................................................................................................................... 15
2.13 AUTO RTS HARDWARE FLOW CONTROL ............................................................................................... 17
2.14
2.15
2.16 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ................................................................................... 19
2.17
2.18 INFRARED MODE ........................................................................................................................................ 19
2.19
2.20
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ............................................................................... 26
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................ 26
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE ............................................................................. 26
F
F
F
F
T
T
T
T
T
F
F
T
F
F
F
F
F
T
F
F
T
T
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
IGURE
ABLE
ABLE
2.11.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY....................................................................................... 14
2.11.2 TRANSMITTER OPERATION IN NON-FIFO MODE ................................................................................................ 14
2.11.3 TRANSMITTER OPERATION IN FIFO MODE ......................................................................................................... 15
2.12.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .......................................................................................... 16
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................. 26
AUTO RTS HYSTERESIS ........................................................................................................................... 17
AUTO CTS FLOW CONTROL ..................................................................................................................... 17
SPECIAL CHARACTER DETECT ............................................................................................................... 19
SLEEP MODE WITH AUTO WAKE-UP ...................................................................................................... 20
INTERNAL LOOPBACK .............................................................................................................................. 21
1: C
2: C
3: INT P
4: INT P
5: TXRDY#
6: T
7: A
8:
9:
1. XR16C854 B
2. P
3. P
4. XR16C854/854D T
5. T
6. B
7. T
8. T
9. R
10. R
11. A
12. I
13. I
..................................................................................................................................................... 1
UART CHANNEL A AND B UART INTERNAL REGISTERS ..................................................................................... 23
INTERNAL REGISTERS DESCRIPTION. S
YPICAL DATA RATES WITH A
UTO
HANNEL
HANNEL
IN
IN
YPICAL OSCILATOR CONNECTIONSL
AUD
RANSMITTER
RANSMITTER
ECEIVER
NFRARED
NTERNAL
............................................................................................................................................... 1
ECEIVER
UTO
O
O
INS
IN
X
UT
UT
R
ON
O
RTS
ATE
O
A-D S
A-D S
AND
A
A
PERATION FOR
/X
PERATION FOR
SSIGNMENT
SSIGNMENT
O
L
OFF
T
O
G
PERATION IN NON
OOP
AND
RANSMIT
RXRDY# O
LOCK
PERATION IN
ENERATOR AND
O
O
................................................................................................................................ 3
ELECT IN
ELECT IN
PERATION IN NON
PERATION IN
(S
CTS F
B
OFTWARE
ACK IN
D
YPICAL
IAGRAM
D
F
F
OR
OR
ATA
R
16 M
68 M
LOW
T
UTPUTS IN
ECEIVER FOR
C
FIFO
RANSMITTER FOR
I
100-
PLCC P
14.7456 MH
NTEL
) F
HANNELS
E
........................................................................................................................................... 1
FIFO
C
-FIFO M
ODE
ODE
P
NCODING AND
TABLE OF CONTENTS
LOW
ONTROL
RESCALER
PIN
AND
/M
-FIFO M
................................................................................................................................. 11
................................................................................................................................. 11
AND
OTOROLA
............................................................................................................................... 13
C
QFP P
ACKAGES
FIFO
A
ONTROL
A-D ..................................................................................................................... 22
ODE
UTO
C
O
F
Z CRYSTAL OR EXTERNAL CLOCK
HANNELS
LOW
PERATION
..................................................................................................................... 14
ODE
AND
.................................................................................................................... 16
ACKAGES
RTS F
R
C
D
I
............................................................................................................... 19
ECEIVE
HADED BITS ARE ENABLED WHEN
HANNELS
C
N
.............................................................................................................. 15
ATA
DMA M
ONTROL
16
LOW
A-D ................................................................................................. 12
....................................................................................................... 18
B
AND
I
I
US
N
D
ODE FOR
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
ATA
C
16
A-D ......................................................................................... 12
I
68 M
M
NTERCONNECTIONS
ONTROL
ODE
AND
D
ECODING
ODE AND
..................................................................................... 15
68 M
C
M
HANNELS
ODE
ODE
.......................................................................... 20
LQFP P
....................................................................... 16
...................................................................... 14
....................................................................... 2
A-D ........................................................... 13
................................................................. 10
EFR B
ACKAGES
IT
-4=1......................................... 24
............................................... 3
XR16C854/854D