XR16C854CV EXAR [Exar Corporation], XR16C854CV Datasheet - Page 13

• Manufacturer Part Number: XR16C854CV
• Description: 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

xr
REV. 3.0.1
The 854 includes an on-chip oscillator (XTAL1 and XTAL2) to produce a clock for all four UART sections in the
device. The CPU data bus does not require this clock for bus operation. The crystal oscillator provides a
system clock to the Baud Rate Generators (BRG) section found in each of the UART. XTAL1 is the input to the
oscillator or external clock buffer input with XTAL2 pin being the output. For programming details, see
“Programmable Baud Rate Generator.”
F
The on-chip oscillator is designed to use an industry standard microprocessor crystal (parallel resonant,
fundamental frequency with 10-22 pF capacitance load, ESR of 20-120 ohms and 100ppm frequency
tolerance) connected externally between the XTAL1 and XTAL2 pins (see
frequencies are: 1.8432, 3.6864, 7.3728, 14.7456, 18.432, and 22.1184 MHz. Alternatively, an external clock
can be connected to the XTAL1 pin to clock the internal baud rate generator for standard or custom rates.
Typical oscillator connections are shown in
application note DAN108 on EXAR’s web site.
Each UART has its own Baud Rate Generator (BRG) with a prescaler. The prescaler is controlled by a
software bit in the MCR register. The MCR register bit-7 sets the prescaler to divide the input crystal or external
clock by 1 or 4. The clock output of the prescaler goes to the BRG. The BRG further divides this clock by a
programmable divisor between 1 and (2
sampling rate clock is used by the transmitter for data bit shifting and receiver for data sampling.
Table 6
rate. When using a non-standard frequency crystal or external clock, the divisor value can be calculated for
DLL/DLM with the following equation.
2.9
2.10
IGURE
RXRDY#
TXRDY#
P
INS
5. T
Crystal Oscillator or External Clock Input
Programmable Baud Rate Generator
shows the standard data rates available with a 14.7456 MHz crystal or external clock at 16X sampling
T
YPICAL OSCILATOR CONNECTIONSL
ABLE
0 = 1 byte
1 = no data
0 = THR empty
1 = byte in THR
(FIFO D
divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 16)
5: TXRDY#
FCR
BIT
ISABLED
-0=0
AND
)
RXRDY# O
0 = at least 1 byte in FIFO
1 = FIFO empty
0 = FIFO empty
1 = at least 1 byte in FIFO
(DMA Mode Disabled)
16
22-47pF
XTAL1
-1) to obtain a 16X sampling rate clock of the serial data rate. The
FCR Bit-3 = 0
C1
UTPUTS IN
Figure
R=300K to 400K
14.7456
MHz
13
5. For further reading on oscillator circuit please see
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
FIFO
FCR B
22-47pF
XTAL2
C2
AND
IT
-0=1 (FIFO E
DMA M
1 to 0 transition when FIFO reaches the trigger
level, or timeout occurs.
0 to 1 transition when FIFO empties.
0 = FIFO has at least 1 empty location.
1 = FIFO is full.
ODE FOR
Figure
(DMA Mode Enabled)
NABLED
FCR Bit-3 = 1
5). Typical standard crystal
C
)
HANNELS
XR16C854/854D
A-D