XR16C854CV EXAR [Exar Corporation], XR16C854CV Datasheet - Page 10
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XR16C854CV
Manufacturer Part Number
XR16C854CV
Description
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
Manufacturer
EXAR [Exar Corporation]
Datasheet
1.XR16C854CV.pdf
(54 pages)
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XR16C854/854D
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
The CPU interface is 8 data bits wide with 3 address lines and control signals to execute data bus read and
write transactions. The 854 data interface supports the Intel compatible types of CPUs and it is compatible to
the industry standard 16C550 UART. No clock (oscillator nor external clock) is required to operate a data bus
transaction. Each bus cycle is asynchronous using CS# A-D, IOR# and IOW# or CS#, R/W#, A4 and A3 inputs.
All four UART channels share the same data bus for host operations. A typical data bus interconnection for
Intel and Motorola mode is shown in
F
2.0 FUNCTIONAL DESCRIPTIONS
2.1
IGURE
4. XR16C854/854D T
CPU Interface
UART_RESET
UART_RESET#
UART_CSA#
UART_CSB#
UART_CSC#
UART_CSD#
UART_INTA
UART_INTB
UART_INTC
UART_INTD
UART_CS#
UART_IRQ#
R/W#
IOW#
IOR#
VCC
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A4
A3
YPICAL
Motorola Data Bus (68 Mode) Interconnections
Figure
Intel Data Bus (16 Mode) Interconnections
I
NTEL
/M
4.
OTOROLA
(no connect)
(no connect)
(no connect)
VCC
VCC
10
D
ATA
16/68#
16/68#
CSB#
CSC#
CSD#
IOW#
CSA#
RESET#
IOR#
IOW#
IOR#
CSC#
CSD#
RESET
CSA#
CSB#
INTA
INTB
INTC
INTD
INTA
INTB
INTC
INTD
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A0
A1
A2
B
US
Channel D
Channel D
Channel A
Channel B
Channel C
Channel A
Channel B
Channel C
I
NTERCONNECTIONS
UART
UART
UART
UART
UART
UART
UART
UART
DSRA#
DTRA#
RTSA#
CTSA#
DSRA#
DTRA#
RTSA#
CTSA#
to Ch A
to Ch A
to Ch A
to Ch A
to Ch A
to Ch A
Similar
Similar
Similar
Similar
Similar
Similar
CDA#
CDA#
GND
GND
RIA#
RIA#
VCC
VCC
TXA
RXA
TXA
RXA
VCC
VCC
Serial Interface of
Serial Interface of
Serial Interface of
RS-232
RS-232
RS-232
Serial Interface of
RS-232
xr
REV. 3.0.1