TSC80251-SK TEMIC [TEMIC Semiconductors], TSC80251-SK Datasheet - Page 48
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TSC80251-SK
Manufacturer Part Number
TSC80251-SK
Description
8/16-bit Microcontroller with Serial Communication Interfaces
Manufacturer
TEMIC [TEMIC Semiconductors]
Datasheet
1.TSC80251-SK.pdf
(63 pages)
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TSC80251G2D
11.5 AC Characteristics - SSLC: I
Timings
Notes:
1. At 100 kbit/s. At other bit-rates this value is inversely proportional to the bit-rate of 100 kbit/s.
2. Determined by the external bus-line capacitance and the external bus-line pull-up resistor, this must be < 1 s.
3. Spikes on the SDA and SCL lines with a duration of less than 3·T
4. T
Waveforms
48
(INPUT/OUTPUT)
(INPUT/OUTPUT)
SCL= 400 pF.
T
T
T
T
CLCL
T
T
T
Symbol
SU
SU
SU
HD
HD
SU
SU
T
T
T
T
T
T
T
; DAT1
; DAT2
; DAT3
HIGH
LOW
SDA
SCL
; DAT
; STA
; STO
BUF
; STA
= T
RC
RD
FC
FD
OSC
= one oscillator clock period.
START or Repeated START condition
Start condition hold time
SCL low time
SCL high time
SCL rise time
SCL fall time
Data set-up time
SDA set-up time (before repeated START condition)
SDA set-up time (before STOP condition)
Data hold time
Repeated START set-up time
STOP condition set-up time
Bus free time
SDA rise time
SDA fall time
Table 53. I
T
HD
T
;STA
FD
2
C Interface AC Timing; V
T
LOW
T
T
Parameter
RD
HIGH
T
RC
T
2
Figure 26. I
SU
C Interface
;DAT1
T
HD
;DAT
2
T
FC
C Waveforms
CLCL
DD
will be filtered out. Maximum capacitance on bus-lines SDA and
= 2.7 to 5.5 V, T
STOP condition
Min
14·T
16·T
14·T
250 ns
250 ns
250 ns
0 ns
14·T
14·T
14·T
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
Repeated START condition
INPUT
(4)
(4)
(4)
(4)
(4)
(4)
T
SU
A
T
;DAT2
= -40 to 85 C
SU
;DAT3
0.3 s
0.3 s
Max
1 s
1 s
0.3 V
T
T
SU
SU
0.7 V
;STA
;STO
DD
DD
Min
4.0 s
4.7 s
4.0 s
20·T
1 s
8·T
8·T
4.7 s
4.0 s
4.7 s
Rev. A - May 7, 1999
CLCL
CLCL
CLCL
(1)
T
(1)
(1)
(1)
(1)
(1)
(1)
BUF
OUTPUT
(4)
(4)
START condition
(4)
- T
- T
FC
0.7 V
RD
0.3 V
0.3 s
0.3 s
DD
DD
Max
-
-
(2)
(3)
(2)
(3)
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