TSC80251-SK TEMIC [TEMIC Semiconductors], TSC80251-SK Datasheet - Page 37

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TSC80251-SK

Manufacturer Part Number
TSC80251-SK
Description
8/16-bit Microcontroller with Serial Communication Interfaces
Manufacturer
TEMIC [TEMIC Semiconductors]
Datasheet
Notes:
1. Under steady-state (non-transient) conditions, I
2. Capacitive loading on Ports 0 and 2 may cause spurious noise pulses above 0.4 V on the low-level outputs of ALE and Ports 1, 2, and
3. Capacitive loading on Ports 0 and 2 causes the V
4. Typical values are obtained using V
5. The input threshold voltage of SCL and SDA meets the I
Note:
1.
Rev. A - May 7, 1999
Maximum I
Maximum I
Maximum Total I
If I
test conditions.
3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins change from high to low. In
applications where capacitive loading exceeds 100 pF, the noise pulses on these signals may exceed 0.8 V. It may be desirable to qualify
ALE or other signals with a Schmitt Trigger or CMOS-level input logic.
0 while an input voltage above 0.7·V
The clock prescaler is not used: F
OL
exceeds the test conditions, V
OL
OL
per port pin: ............................................. 10 mA
per 8-bit port:
max Active mode (mA)
typ Active mode (mA)
max Idle mode (mA)
typ Idle mode (mA)
OL
15
10
5
0
for all:
Figure 12. I
2
OSC
OL
DD
DD
= F
Port 0................. 26 mA
Ports 1-3............ 15 mA
Output Pins ....... 71 mA
= 3 V and T
may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
will be recognized as a logic 1.
DD
XTAL
/I
.
DL
4
OL
OH
Versus X
must be externally limited as follows:
on ALE and PSEN# to drop below the specification when the address lines are stabilizing.
A
= 25 C. They are not tested and there is not guarantee on these values.
Frequency at X
2
C specification, so an input voltage below 0.3·V
6
TAL
Frequency; V
8
TAL
(1)
(MHz)
10
DD
= 2.7 to 3.6 V
TSC80251G2D
12
DD
will be recognized as a logic
14
16
37

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