TSC80251-SK TEMIC [TEMIC Semiconductors], TSC80251-SK Datasheet - Page 23

• Manufacturer Part Number: TSC80251-SK
• Description: 8/16-bit Microcontroller with Serial Communication Interfaces
• Manufacturer: TEMIC [TEMIC Semiconductors]

TSC80251G2D
Notes:
1. Instructions that move bits are in Table 29.
2. Move instructions unique to the C251 Architecture.
3. If this instruction addresses an I/O Port (Px, x= 0-3), add 1 to the number of states. Add 2 if it addresses a Peripheral SFR.
4. If this instruction addresses external memory location, add N+2 to the number of states (N: number of wait states).
5. If this instruction addresses external memory location, add 2(N+1) to the number of states (N: number of wait states).
6. If this instruction addresses external memory location, add 4(N+2) to the number of states (N: number of wait states).
23
Move
MOV
Mnemonic
(1)
Rmd, Rms
WRjd, WRjs
DRkd, DRks
Rm, #data
WRj, #data16
DRk, #0data16
DRk, #1data16
Rm, dir8
WRj, dir8
DRk, dir8
Rm, dir16
WRj, dir16
DRk, dir16
Rm, @WRj
Rm, @DRk
WRjd, @WRjs
WRj, @DRk
dir8, Rm
dir8, WRj
dir8, DRk
dir16, Rm
dir16, WRj
dir16, DRk
@WRj, Rm
@DRk, Rm
@WRjd, WRjs
@DRk, WRj
Rm, @WRj +dis16
WRj, @WRj +dis16 Indirect with 16-bit displacement (64K) to word register
Rm, @DRk +dis24
WRj, @WRj +dis24 Indirect with 16-bit displacement (16M) to word register
@WRj +dis16, Rm
@WRj +dis16, WRj Word register to indirect with 16-bit displacement (64K)
@DRk +dis24, Rm
@DRk +dis24, WRj Word register to indirect with 16-bit displacement (16M)
<dest>, <src>
(1)
MOV <dest>, <src>
Table 28. Summary of Move Instructions (3/3)
Byte register to byte register
Word register to word register
Dword register to dword register
Immediate 8-bit data to byte register
Immediate 16-bit data to word register
zero-ext 16bit immediate data to dword register
one-ext 16bit immediate data to dword register
Direct address (on-chip RAM or SFR) to byte register
Direct address (on-chip RAM or SFR) to word register
Direct address (on-chip RAM or SFR) to dword register
Direct address (64K) to byte register
Direct address (64K) to word register
Direct address (64K) to dword register
Indirect address (64K) to byte register
Indirect address (16M) to byte register
Indirect address (64K) to word register
Indirect address (16M) to word register
Byte register to direct address (on-chip RAM or SFR)
Word register to direct address (on-chip RAM or SFR)
Dword register to direct address (on-chip RAM or SFR)
Byte register to direct address (64K)
Word register to direct address (64K)
Dword register to direct address (64K)
Byte register to indirect address (64K)
Byte register to indirect address (16M)
Word register to indirect address (64K)
Word register to indirect address (16M)
Indirect with 16-bit displacement (64K) to byte register
Indirect with 16-bit displacement (16M) to byte register
Byte register to indirect with 16-bit displacement (64K)
Byte register to indirect with 16-bit displacement (16M)
Comments
dest opnd
src opnd
Bytes
Binary Mode
3
3
3
4
5
5
5
4
4
4
5
5
5
4
4
4
4
4
4
4
5
5
5
4
4
4
4
5
5
5
5
5
5
5
5
States
3
3
4
6
3
4
4
5
4
4
5
7
4
5
5
6
6
7
7
8
6
7
7
8
2
2
3
3
3
5
5
4
6
5
7
(3)
(4)
(5)
(6)
(4)
(4)
(5)
(5)
(3)
(4)
(5)
(6)
(4)
(4)
(5)
(5)
(4)
(5)
(4)
(5)
(4)
(5)
(4)
(5)
Rev. A - May 7, 1999
Bytes
Source Mode
2
2
2
3
4
4
4
3
3
3
4
4
4
3
3
3
3
3
3
3
4
4
4
3
3
3
3
4
4
4
4
4
4
4
4
States
2
2
3
5
2
3
3
4
3
3
4
6
3
4
4
5
5
6
6
7
5
6
6
7
1
1
2
2
2
4
4
3
5
4
6
(3)
(4)
(5)
(6)
(4)
(4)
(5)
(5)
(3)
(4)
(5)
(6)
(4)
(4)
(5)
(5)
(4)
(5)
(4)
(5)
(4)
(5)
(4)
(5)