TSC80251-SK TEMIC [TEMIC Semiconductors], TSC80251-SK Datasheet - Page 22

• Manufacturer Part Number: TSC80251-SK
• Description: 8/16-bit Microcontroller with Serial Communication Interfaces
• Manufacturer: TEMIC [TEMIC Semiconductors]

Notes:
1. A shaded cell denotes an instruction in the C51 Architecture.
2. Extended memory addressed is in the region specified by DPXL (reset value= 01h).
3. If this instruction addresses external memory location, add N+1 to the number of states (N: number of wait states).
4. If this instruction addresses external memory location, add N+2 to the number of states (N: number of wait states).
Notes:
1. Instructions that move bits are in Table 29.
2. Move instructions from the C51 Architecture.
3. If this instruction addresses an I/O Port (Px, x= 0-3), add 1 to the number of states. Add 2 if it addresses a Peripheral SFR.
4. Apply note 3 for each dir8 operand.
Rev. A - May 7, 1999
Move to High word
Move with Sign extension
Move with Zero extension
Move Code
Move eXtended
MOVH
MOVS
MOVZ
MOVC
MOVX
Move
MOV
Mnemonic
Mnemonic
(1)
DRk, #data16
WRj, Rm
WRj, Rm
A, @A +DPTR
A, @A +PC
A, @Ri
A, @DPTR
@Ri, A
@DPTR, A
A, Rn
A, dir8
A, @Ri
A, #data
Rn, A
Rn, dir8
Rn, #data
dir8, A
dir8, Rn
dir8, dir8
dir8, @Ri
dir8, #data
@Ri, A
@Ri, dir8
@Ri, #data
DPTR, #data16
<dest>, <src>
<dest>, <src>
(2)
(2)
MOVH <dest>, <src>
MOVS <dest>, <src>
MOVZ <dest>, <src>
MOVC A, <src>
MOVX <dest>, <src>
MOV <dest>, <src>
Table 26. Summary of Move Instructions (1/3)
Table 27. Summary of Move Instructions (2/3)
16-bit immediate data into upper word of dword register
Byte register to word register with sign extension
Byte register to word register with zeros extension
Code byte relative to DPTR to ACC
Code byte relative to PC to ACC
Extended memory (8-bit address) to ACC
Extended memory (16-bit address) to ACC
ACC to extended memory (8-bit address)
ACC to extended memory (16-bit address)
Register to ACC
Direct address (on-chip RAM or SFR) to ACC
Indirect address to ACC
Immediate data to ACC
ACC to register
Direct address (on-chip RAM or SFR) to register
Immediate data to register
ACC to direct address (on-chip RAM or SFR)
Register to direct address (on-chip RAM or SFR)
Direct address to direct address (on-chip RAM or SFR)
Indirect address to direct address (on-chip RAM or SFR)
Immediate data to direct address (on-chip RAM or SFR)
ACC to indirect address
Direct address (on-chip RAM or SFR) to indirect address
Immediate data to indirect address
Load Data Pointer with a 16-bit constant
Comments
Comments
(2)
(2)
(2)
(2)
dest opnd
dest opnd
dest opnd
(A)
dest opnd
dest opnd
src opnd
31:16
TSC80251G2D
src opnd with sign extend
src opnd with zero extend
src opnd
src opnd
Bytes
Bytes
Binary Mode
Binary Mode
src opnd
5
3
3
1
1
1
1
1
1
1
2
1
2
1
2
2
2
2
3
2
3
1
2
2
3
States
States
6
6
3
4
1
1
2
2
3
3
3
3
3
2
2
(3)
(3)
4
(4)
4
(3)
1
(3)
2
1
1
(3)
1
(3)
(3)
(4)
(3)
(3)
3
(3)
3
2
Bytes
Bytes
Source Mode
Source Mode
4
2
2
1
1
1
1
1
1
2
2
2
2
2
3
3
2
3
3
3
3
2
3
3
3
States
States
6
6
3
4
1
2
2
3
3
4
3
4
2
1
1
(3)
(3)
5
(4)
4
(3)
2
(3)
3
1
2
(3)
2
(3)
(3)
(4)
(3)
(3)
4
(3)
4
2
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