MC9S08SG32E1JTGR FREESCALE [Freescale Semiconductor, Inc], MC9S08SG32E1JTGR Datasheet - Page 35

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MC9S08SG32E1JTGR

Manufacturer Part Number
MC9S08SG32E1JTGR
Description
HCS08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Freescale Semiconductor
1
2
3
4
5
6
7
CPU
RAM
FLASH
Parallel Port Registers
ADC
ACMP
BDM
ICS
IIC
LVD/LVW
MTIM
RTC
SCI
SPI
TPM
Voltage Regulator
XOSC
I/O Pins
Requires the asynchronous ADC clock and LVD to be enabled, else in
standby.
Requires the LVD to be enabled when compare to internal band-up reference
option is enabled.
If ENBDM is set when entering stop2, the MCU will actually enter stop3.
IRCLKEN and IREFSTEN set in ICSC1, else in standby.
If LVDSE is set when entering stop2, the MCU will actually enter stop3.
Voltage regulator will be on if BDM is enabled or if LVD is enabled when
entering stop3.
ERCLKEN and EREFSTEN set in ICSC2, else in standby. For high frequency
range (RANGE in ICSC2 set) requires the LVD to also be enabled in stop3.
Peripheral
Table 3-2. Stop Mode Behavior
MC9S08SG32 Data Sheet, Rev. 7
Optionally On
States Held
Standby
Standby
Stop2
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
3
5
Mode
Optionally On
Optionally On
Optionally On
Optionally On
Optionally On
Optionally On
Optionally On
Optionally On
States Held
Standby
Standby
Standby
Standby
Standby
Standby
Standby
Standby
Standby
Stop3
1
2
4
6
7
Chapter 3 Modes of Operation
35

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