MC9S08SG32E1JTGR FREESCALE [Freescale Semiconductor, Inc], MC9S08SG32E1JTGR Datasheet - Page 317

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MC9S08SG32E1JTGR

Manufacturer Part Number
MC9S08SG32E1JTGR
Description
HCS08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
A.12.3
Table A-15
Freescale Semiconductor
1
2
Num
Refer to
All timing is shown with respect to 20% V
assumes slew rate control disabled and high drive strength enabled for SPI output pins.
10
11
12
1
2
3
4
5
6
7
8
9
1
and
SPI
Figure A-14
Figure A-14
C
D
D
D
D
D
D
D
D
D
D
D
D
Cycle time
Enable lead time
Enable lag time
Clock (SPSCK) high time
Master and Slave
Clock (SPSCK) low time
Master and Slave
Data setup time (inputs)
Data hold time (inputs)
Access time, slave
Disable time, slave
Data setup time (outputs)
Data hold time (outputs)
Operating frequency
through
through
Rating
Figure
Table A-15. SPI Electrical Characteristic
3
4
2
Figure A-17
MC9S08SG32 Data Sheet, Rev. 7
A-17.
Master
Master
Master
Master
Master
Master
Master
Master
DD
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
and 70% V
Symbol
t
t
t
describe the timing requirements for the SPI system.
t
t
t
t
t
SCKH
SCKL
t
t
SI(M)
HI(M)
t
t
SI(S)
HI(S)
Lead
Lead
t
t
t
t
t
SCK
SCK
Lag
Lag
f
f
SO
SO
HO
HO
t
dis
op
op
A
DD
, unless noted; 100 pF load on all SPI pins. All timing
1/2 t
1/2 t
f
Bus
SCK
SCK
Min
–10
–10
1/2
1/2
30
30
30
30
dc
/2048
2
4
0
– 25
– 25
f
2048
Bus
Max
1/2
1/2
40
40
25
25
5
Appendix A Electrical Characteristics
5
/4
t
t
t
t
MHz
Unit
SCK
SCK
SCK
SCK
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
Rated
Temp
317

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