MC9S08SG32E1JTGR FREESCALE [Freescale Semiconductor, Inc], MC9S08SG32E1JTGR Datasheet - Page 29

• Manufacturer Part Number: MC9S08SG32E1JTGR
• Description: HCS08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Freescale Semiconductor
1
2
3
4
5
6
7
28-pin 20-pin
The 20-pin package is not available for the high-temperature rated devices.
Pin is open drain with an internal pullup that is always enabled. Pin does not contain a clamp diode to V
and should not be driven above V
pulled to V
IIC pins can be repositioned using IICPS in SOPT2, default reset locations are PTA2, PTA3.
TPM1CHx pins can be repositioned using T1CHxPS bits in SOPT2, default reset locations are PTA0, PTB5.
This port pin is part of the ganged output feature. When pin is enabled for ganged output, it will have priority
over all digital modules. The output data, drive strength and slew-rate control of this port pin will follow the
configuration for the PTC0 pin, even in 16-pin packages where PTC0 doesn’t bond out.
TPM2CHx pins can be repositioned using T2CHxPS bits in SOPT2, default reset locations are PTA1, PTB4.
If ACMP and ADC are both enabled, both will have access to the pin.
19
20
21
22
23
24
25
26
27
28
Pin Number
15
16
17
18
19
20
—
—
—
—
DD
. The internal gates connected to this pin are pulled to V
1
Table 2-1. Pin Availability by Package Pin-Count (continued)
16-pin
11
12
13
14
15
16
—
—
—
—
PTB1
PTB0
PTA7
PTA6
PTA3
PTA2
PTA1
PTA0
PTC7
PTC6
Port Pin
DD
MC9S08SG32 Data Sheet, Rev. 7
. The voltage measured on the internally pulled up RESET will not be
Lowest
PIB1
PIB0
TPM2CH1
TPM2CH0
PIA3
PIA2
PIA1
PIA0
Alt 1
6
6
TxD
RxD
SCL
SDA
TPM2CH0
TPM1CH0
Alt 2
3
3
Priority
6
4
ACMPO
TCLK
DD
Alt 3
.
ADP5
ADP4
ADP3
ADP2
ADP1
ADP0
Alt 4
Chapter 2 Pins and Connections
7
7
Highest
ACMP-
ACMP+
ADP15
ADP14
Alt 5
7
7
DD
29