MC9S08AW60 FREESCALE [Freescale Semiconductor, Inc], MC9S08AW60 Datasheet - Page 94

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MC9S08AW60

Manufacturer Part Number
MC9S08AW60
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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0
Chapter 6 Parallel Input/Output
6.7.5
Port C parallel I/O function is controlled by the registers listed below.
94
PTCDD[6:0]
PTCD[6:0]
Reset
Reset
Field
Field
6:0
6:0
W
W
R
R
Port C I/O Registers (PTCD and PTCDD)
Port C Data Register Bits — For port C pins that are inputs, reads return the logic level on the pin. For port C
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port C pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTCD to all 0s, but these 0s are not driven out the corresponding pins because reset also
configures all port pins as high-impedance inputs with pullups disabled.
Data Direction for Port C Bits — These read/write bits control the direction of port C pins and what is read for
PTCD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port C bit n and PTCD reads return the contents of PTCDn.
0
0
7
7
PTCDD6
PTCD6
0
0
6
6
Table 6-13. PTCDD Register Field Descriptions
Figure 6-20. Data Direction for Port C (PTCDD)
Table 6-12. PTCD Register Field Descriptions
Figure 6-19. Port C Data Register (PTCD)
PTCDD5
PTCD5
0
0
5
5
MC9S08AW60 Data Sheet, Rev 2
PTCDD4
PTCD4
0
0
4
4
Description
Description
PTCDD3
PTCD3
3
0
3
0
PTCDD2
PTCD2
0
0
2
2
PTCDD1
Freescale Semiconductor
PTCD1
0
0
1
1
PTCDD0
PTCD0
0
0
0
0

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