MC9S08AW60 FREESCALE [Freescale Semiconductor, Inc], MC9S08AW60 Datasheet - Page 139

• Manufacturer Part Number: MC9S08AW60
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

8.3.4
8.3.5
Freescale Semiconductor
Reset
Reset
DCOS
Field
Field
FLT
3:0
0
W
W
R
R
ICG Status Register 2 (ICGS2)
ICG Filter Registers (ICGFLTU, ICGFLTL)
DCO Clock Stable — The DCOS bit is set when the DCO clock (ICG2DCLK) is stable, meaning the count error
has not changed by more than n
used when exiting off state if CLKS = X1 to determine when to switch to the requested clock mode. It is also used
in self-clocked mode to determine when to start monitoring the DCO clock. This bit is cleared upon entering the
off state.
0 DCO clock is unstable.
1 DCO clock is stable.
Filter Value — The FLT bits indicate the current filter value, which controls the DCO frequency. The FLT bits are
read only except when the CLKS bits are programmed to self-clocked mode (CLKS = 00). In self-clocked mode,
any write to ICGFLTU updates the current 12-bit filter value. Writes to the ICGFLTU register will not affect FLT if
a previous latch sequence is not complete.
0
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 8-10. ICG Upper Filter Register (ICGFLTU)
Table 8-5. ICGFLTU Register Field Descriptions
Table 8-4. ICGS2 Register Field Descriptions
Figure 8-9. ICG Status Register 2 (ICGS2)
0
0
0
0
5
5
MC9S08AW60 Data Sheet, Rev 2
unlock
for two consecutive samples and the DCO clock is not static. This bit is
0
0
0
0
4
4
Description
Description
3
0
0
3
0
Chapter 8 Internal Clock Generator (S08ICGV4)
0
0
0
2
2
FLT
0
0
0
1
1
DCOS
0
0
0
0
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