MC9S08AW60 FREESCALE [Freescale Semiconductor, Inc], MC9S08AW60 Datasheet - Page 201
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MC9S08AW60
Manufacturer Part Number
MC9S08AW60
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S08AW60.pdf
(324 pages)
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12.0.1
Features of the SPI module include:
12.0.2
This section includes block diagrams showing SPI system connections, the internal organization of the SPI
module, and the SPI clock dividers that control the master mode bit rate.
12.0.2.1
Figure 12-2
device initiates all SPI data transfers. During a transfer, the master shifts data out (on the MOSI pin) to the
slave while simultaneously shifting data in (on the MISO pin) from the slave. The transfer effectively
exchanges the data that was in the SPI shift registers of the two SPI systems. The SPSCK signal is a clock
output from the master and an input to the slave. The slave device must be selected by a low level on the
slave select input (SS pin). In this system, the master device has configured its SS pin as an optional slave
select output.
Freescale Semiconductor
•
•
•
•
•
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Master or slave mode operation
Full-duplex or single-wire bidirectional option
Programmable transmit bit rate
Double-buffered transmit and receive
Serial clock phase and polarity options
Slave select output
Selectable MSB-first or LSB-first shifting
7
6
Features
Block Diagrams
shows the SPI modules of two MCUs connected in a master-slave arrangement. The master
SPI System Block Diagram
5
GENERATOR
SPI SHIFTER
MASTER
CLOCK
4
3
2
1
0
Figure 12-2. SPI System Connections
MC9S08AW60 Data Sheet, Rev 2
MOSI
MISO
SPSCK
SS
SPSCK
MOSI
MISO
SS
Chapter 12 Serial Peripheral Interface (S08SPIV3)
7
SLAVE
6
5
SPI SHIFTER
4
3
2
1
0
201