AT91RM3400-AI-001 ATMEL [ATMEL Corporation], AT91RM3400-AI-001 Datasheet - Page 384

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AT91RM3400-AI-001

Manufacturer Part Number
AT91RM3400-AI-001
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
MCI Mode Register
Name:
Access Type:
• CLKDIV: Clock Divider
Multi-Media Card Interface clock (MCCK) is Master Clock (MCK) divided by (2*(CLKDIV+1)).
• PWSDIV: Power Saving Divider
Multimedia Card Interface clock is divided by 2
• PDCPADV: PDC Padding Value
0 = 0x00 value is used when padding data in write transfer (not only PDC transfer).
1 = 0xFF value is used when padding data in write transfer (not only PDC transfer).
• PDCMODE: PDC-oriented Mode
0 = Disables PDC transfer
1 = Enables PDC transfer. In this case, UNRE and OVRE (MCI_SR)
• BLKLEN: Data Block Length
This field determines the size of the data block.
Bits 16 and 17 must be 0.
384
PDCMODE
31
23
15
7
AT91RM3400
PDCPADV
MCI_MR
Read/write
30
22
14
6
29
21
13
5
BLKLEN
(PWSDIV)
28
20
12
4
when entering Power Saving Mode.
CLKDIV
27
19
11
3
are deactivated.
BLKLEN
26
18
10
2
PWSDIV
25
17
0
9
1
1790A–ATARM–11/03
24
16
0
8
0

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