AT91RM3400-AI-001 ATMEL [ATMEL Corporation], AT91RM3400-AI-001 Datasheet - Page 396
AT91RM3400-AI-001
Manufacturer Part Number
AT91RM3400-AI-001
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91RM3400-AI-001.pdf
(461 pages)
- Current page: 396 of 461
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Block Diagram
Figure 161. USB Device Port Block Diagram
396
MCK
UDPCK
udp_int
External Resume
Atmel Bridge
AT91RM3400
MCU
APB
Bus
to
Access to the UDP is via the APB bus interface. Read and write to the data FIFO are done by
reading and writing 8-bit values to APB registers.
The UDP peripheral requires two clocks: one peripheral clock used by the MCK domain and a
48 MHz clock used by the 12 MHz domain.
A USB 2.0 full-speed pad is embedded and controlled by the SIE.
The signal external_resume is optional. It allows the UDP peripheral to wake-up once in sys-
tem mode. The host will then be notified that the device asks for a resume. This optional
feature must be also negotiated with the host during the enumeration.
U
s
e
n
e
a
c
e
r
r
I
t
f
W
a
p
p
e
Master Clock
Domain
r
r
USB Device
FIFO
RAM
Dual
Port
Recovered 12 MHz
Domain
W
a
p
p
e
r
r
Suspend/Resume Logic
12 MHz
Interface
Engine
Serial
SIE
txoen
eopn
txd
rxdm
rxd
rxdp
Transceiver
Embedded
1790A–ATARM–11/03
USB
DM
DP
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