AT91RM3400-AI-001 ATMEL [ATMEL Corporation], AT91RM3400-AI-001 Datasheet - Page 345
AT91RM3400-AI-001
Manufacturer Part Number
AT91RM3400-AI-001
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91RM3400-AI-001.pdf
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Pin Name List
Product
Dependencies
I/O Lines
Power
Management
Interrupt
Functional
Description
TC Description
16-bit Counter
Clock Selection
1790A–ATARM–11/03
Table 60. Timer Counter pin list
For further details on the Timer Counter hardware implementation, see the specific Product
Properties document.
The pins used for interfacing the compliant external devices may be multiplexed with PIO
lines. The programmer must first program the PIO controllers to assign the TC pins to their
peripheral functions.
The TC must be clocked through the Power Management Controller (PMC), thus the program-
mer must first configure the PMC to enable the Timer Counter.
The TC interface has an interrupt line connected to the Advanced Interrupt Controller (AIC).
Handling the TC interrupt requires programming the AIC before configuring the TC.
The three channels of the Timer Counter are independent and identical in operation. The reg-
isters for channel programming are listed in Table 60 on page 345.
Each channel is organized around a 16-bit counter. The value of the counter is incremented at
each positive edge of the selected clock. When the counter has reached the value 0xFFFF
and passes to 0x0000, an overflow occurs and the COVFS bit in TC_SR (Status Register) is
set.
The current value of the counter is accessible in real time by reading the Counter Value Regis-
ter, TC_CV. The counter can be reset by a trigger. In this case, the counter value passes to
0x0000 on the next valid edge of the selected clock.
At block level, input clock signals of each channel can either be connected to the external
inputs TCLK0, TCLK1 or TCLK2, or be connected to the configurable I/O signals TIOA0,
TIOA1 or TIOA2 for chaining by programming the TC_BMR (Block Mode). See Figure 139.
Each channel can independently select an internal or external clock source for its counter:
•
•
This selection is made by the TCCLKS bits in the TC Channel Mode Register (Capture Mode).
The selected clock can be inverted with the CLKI bit in TC_CMR (Capture Mode). This allows
counting on the opposite edges of the clock.
Pin Name
TCLK0-TCLK2
TIOA0-TIOA2
TIOB0-TIOB2
Internal clock signals: TIMER_CLOCK1, TIMER_CLOCK2, TIMER_CLOCK3,
TIMER_CLOCK4, TIMER_CLOCK5
External clock signals: XC0, XC1 or XC2
External Clock Input
I/O Line A
I/O Line B
Description
Type
Input
I/O
I/O
AT91RM3400
345
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