AT91RM3400-AI-001 ATMEL [ATMEL Corporation], AT91RM3400-AI-001 Datasheet - Page 322
AT91RM3400-AI-001
Manufacturer Part Number
AT91RM3400-AI-001
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91RM3400-AI-001.pdf
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Loop Mode
Interrupt
322
AT91RM3400
Figure 132. Transmit Frame Format in Continuous Mode
Note:
Figure 133. Receive Frame Format in Continuous Mode
Note:
The receiver can be programmed to receive transmissions from the transmitter. This is done
by setting the Loop Mode (LOOP) bit in SSC_RFMR. In this case, RD is connected to TD, RF
is connected to TF and RK is connected to TK.
Most bits in SSC_SR have a corresponding bit in interrupt management registers.
The SSC Controller can be programmed to generate an interrupt when it detects an event.
The Interrupt is controlled by writing SSC_IER (Interrupt Enable Register) and SSC_IDR
(Interrupt Disable Register), which respectively enable and disable the corresponding interrupt
by setting and clearing the corresponding bit in SSC_IMR (Interrupt Mask Register), which
controls the generation of interrupts by asserting the SSC interrupt line connected to the AIC.
Figure 134. Interrupt Block Diagram
1. STTDLY is set to 0. In this example, SSC_THR is loaded twice. The value of FSDEN has no
1. STTDLY is set to 0.
effect on transmission. SyncData cannot be output in continuous mode.
TD
Start: 1. TXEMPTY set to 1
TXBUFE
ENDTX
RXBUFF
ENDRX
PDC
2. Write to the SSC_THR
RD
From SSC_THR
Start
DATLEN
Data
Start = Enable Receiver
Transmitter
Receiver
To SSC_RHR
TXEMPTY
DATLEN
TXSYNC
RXSYNC
RXRDY
OVRUN
TXRDY
Data
From SSC_THR
DATLEN
SSC_IER
Data
Set
To SSC_RHR
SSC_IMR
Interrupt
DATLEN
Control
Data
SSC_IDR
Clear
SSC Interrupt
Default
1790A–ATARM–11/03
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