PIC24FJ128GB MICROCHIP [Microchip Technology], PIC24FJ128GB Datasheet - Page 57

• Manufacturer Part Number: PIC24FJ128GB
• Description: 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)
• Manufacturer: MICROCHIP [Microchip Technology]

4.0
The PIC24FJ256GB110 family of devices contains
internal Flash program memory for storing and execut-
ing application code. It can be programmed in four
ways:
• In-Circuit Serial Programming™ (ICSP™)
• Run-Time Self-Programming (RTSP)
• JTAG
• Enhanced In-Circuit Serial Programming™
ICSP allows a PIC24FJ256GB110 family device to be
serially programmed while in the end application circuit.
This is simply done with two lines for the programming
clock and programming data (which are named PGECx
and PGEDx, respectively), and three other lines for
power (V
This allows customers to manufacture boards with
unprogrammed devices and then program the micro-
controller just before shipping the product. This also
allows the most recent firmware or a custom firmware
to be programmed.
FIGURE 4-1:
© 2008 Microchip Technology Inc.
Note:
(Enhanced ICSP™)
FLASH PROGRAM MEMORY
DD
), ground (V
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
”Section
(DS39715).
User/Configuration
Space Select
Family
ADDRESSING FOR TABLE REGISTERS
SS
4.
) and Master Clear (MCLR).
Using
Program
Counter
Using
Table
Instruction
Program
Reference
1/0
0
Memory”
Manual”,
TBLPAG Reg
PIC24FJ256GB110 FAMILY
8 Bits
Preliminary
Program Counter
24-Bit EA
24 Bits
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
may write program memory data in blocks of 64 instruc-
tions (192 bytes) at a time, and erase program memory
in blocks of 512 instructions (1536 bytes) at a time.
4.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using the TBLPAG<7:0> bits and the Effective
Address (EA) from a W register specified in the table
instruction, as shown in Figure 4-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 Bits
Table Instructions and Flash
Programming
0
Byte
Select
DS39897B-page 55