PIC24FJ128GB MICROCHIP [Microchip Technology], PIC24FJ128GB Datasheet - Page 227
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PIC24FJ128GB
Manufacturer Part Number
PIC24FJ128GB
Description
64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC24FJ128GB.pdf
(328 pages)
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18.0
The Parallel Master Port (PMP) module is a parallel
8-bit I/O module, specifically designed to communicate
with a wide variety of parallel devices, such as commu-
nication peripherals, LCDs, external memory devices
and microcontrollers. Because the interface to parallel
peripherals varies significantly, the PMP is highly
configurable.
FIGURE 18-1:
© 2008 Microchip Technology Inc.
Note:
Parallel Master Port
PARALLEL MASTER PORT
(PMP)
PIC24F
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
”Section
(PMP)” (DS39713).
Family
PMP MODULE OVERVIEW
13.
Parallel
Reference
Master
PMA<0>
PMALL
PMA<1>
PMALH
PMA<13:2>
PMA<14>
PMCS1
PMA<15>
PMCS2
PMBE
PMRD
PMRD/PMWR
PMWR
PMENB
PMD<7:0>
PMA<7:0>
PMA<15:8>
Manual”,
PIC24FJ256GB110 FAMILY
Port
Preliminary
Microcontroller
Key features of the PMP module include:
• Up to 16 Programmable Address Lines
• Up to 2 Chip Select Lines
• Programmable Strobe Options:
• Address Auto-Increment/Auto-Decrement
• Programmable Address/Data Multiplexing
• Programmable Polarity on Control Signals
• Legacy Parallel Slave Port Support
• Enhanced Parallel Slave Support:
• Programmable Wait States
• Selectable Input Voltage Levels
- Individual Read and Write Strobes or;
- Read/Write Strobe with Enable Strobe
- Address Support
- 4-Byte Deep Auto-Incrementing Buffer
Up to 16-Bit Address
8-Bit Data
LCD
Address Bus
Data Bus
Control Lines
Buffer
FIFO
DS39897B-page 225
EEPROM
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