PXF4333V11 INFINEON [Infineon Technologies AG], PXF4333V11 Datasheet - Page 307

• Manufacturer Part Number: PXF4333V11
• Description: ABM 3G ATM Buf fer Manager
• Manufacturer: INFINEON [Infineon Technologies AG]

7.2.26
Register 107 MAR
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
Start_W
Start_R
MAR(4:0)
Data Sheet
Unused Start_W
15
7
RAM Select Registers
Memory Address Register
14
This command bit starts the Write procedure to the internal RAM/
table addressed by bit field MAR(4:0). The specific data transfer
and mask registers must be prepared appropriately in advance.
This bit is automatically cleared after completion of the Write
procedure.
Simplifies Read access without need to touch the mask registers
Memory Address
This bit field selects one of the internal RAM/tables for Read or
Write operation:
00000
00001
00010
00011
00111
01010
10000
6
Read/Write
0000
MAR
Written by CPU to address internal RAM/tables for Read
or Write operation via transfer registers
H
Start_R
13
5
LCI: LCI Table RAM (see page 191)
SBOC: Scheduler Block Occupation Table (see page
AVT: VBR Table (see page 280)
QPT1 Upstream:
TCT: Traffic Class Table (see page 195)
QCT: Queue Configuration Table (see page 211)
223)
MGT: Merge Group Table (see page 230)
Queue Parameter Table 1 Up (see page 247)
EB
H
12
Unused(9:2)
4
307
11
3
MAR(4:0)
10
2
Register Description
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
8
0