PXF4333V11 INFINEON [Infineon Technologies AG], PXF4333V11 Datasheet - Page 268

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PXF4333V11

Manufacturer Part Number
PXF4333V11
Description
ABM 3G ATM Buf fer Manager
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
The Read or Write process is controlled by the
LSBs (= Bit 4..0) of the MAR register select the memory/table that will be accessed; to
select the SCTF Upstream table, bit field MAR(4:0) must be set to 17
SCTF Downstream table respectively. Bit 5 of MAR starts the transfer and is
automatically cleared after execution.
Table 7-24
Bit
Bit
SchedSel(6:0)
Data Sheet
unused
15
7
WAR Register Mapping for SCTFU/SCTFD Table access
14
Selects one of the 128 core specific Scheduler Blocks.
6
13
5
12
Unused(9:2)
4
268
SchedSel(6:0)
MAR
11
3
(Memory Address Register). The 5
10
2
Register Description
H
PXF 4333 V1.1
9
1
and 1F
2001-12-17
ABM-3G
H
for the
8
0

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