PXF4333V11 INFINEON [Infineon Technologies AG], PXF4333V11 Datasheet - Page 275
![no-image](/images/no-image-200.jpg)
PXF4333V11
Manufacturer Part Number
PXF4333V11
Description
ABM 3G ATM Buf fer Manager
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PXF4333V11.pdf
(361 pages)
- Current page: 275 of 361
- Download datasheet (6Mb)
Register 82 USCEN5/DSCEN5
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
SchedEn(95:80)
Data Sheet
15
7
Upstream/Downstream Scheduler Block Enable 5 Registers
14
Scheduler Block Enable
Each bit position enables/disables the respective Scheduler Block
(95..80):
1
0
6
Read/Write
0000
USCEN5
Written by CPU for global Scheduler configuration
H
13
5
Scheduler Block enabled
Scheduler Block disabled
AD
SchedEn(95:88)
SchedEn(87:80)
H
12
4
275
DSCEN5
11
3
10
2
C5
Register Description
H
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
8
0
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