PXF4333V11 INFINEON [Infineon Technologies AG], PXF4333V11 Datasheet - Page 215
![no-image](/images/no-image-200.jpg)
PXF4333V11
Manufacturer Part Number
PXF4333V11
Description
ABM 3G ATM Buf fer Manager
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PXF4333V11.pdf
(361 pages)
- Current page: 215 of 361
- Download datasheet (6Mb)
QIDvalid
Data Sheet
’1’
Note: To activate or deactivate a dummy queue, command bit
Queue Enable:
’DQac’ must be set in conjunction with setting or resetting bit
’RSall’.
The queue is always scheduled/re-scheduled with its
specific rate independent of the queue filling level.
Scheduling an empty queue results in an ’empty cell
cycle’ (no cell is emitted during this cycle).
A so called ’dummy queue’ is used for generating empty
cell cycles.
Note: ’RSall’ can be set with connection setup (together
Note: ’RSall’ can be reset anytime while the queue is
with QIDvalid=’1’) or anytime while the queue is
enabled.
After setting bit ’RSall’, the ABM-3G will
automatically
acknowledge the first dummy schedule event.
The ’RSall’ information is internally conveyed to
the scheduler. This process is acknowledged by
an interrupt (Bit ’UDQRD/DDQRD’ in Register
103: ISRC). It is recommended not to select any
other table or table entry while waiting for this
acknowledge.
enabled. In response to resetting ’RSall’ the
ABM-3G will generate an interrupt (Bit ’UDQRD/
DDQRD’ in Register 103: ISRC) and reset bit
’MGconf/DQsch’ in this table.
215
set
bit
’MGconf/DQsch’
Register Description
PXF 4333 V1.1
2001-12-17
ABM-3G
to
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