ADP1046-100-EVALZ AD [Analog Devices], ADP1046-100-EVALZ Datasheet - Page 87

• Manufacturer Part Number: ADP1046-100-EVALZ
• Description: Digital Controller for Isolated
• Manufacturer: AD [Analog Devices]

Data Sheet
RESONANT MODE OPERATION
The
Resonant converters are an alternative to traditional fixed
frequency converters. They offer high switching frequency,
small size, and high efficiency. Figure 59 illustrates a widely
used series resonant converter.
RESONANT MODE ENABLE
To enable the
verter, Register 0x40 must be set to a value of 0x3F. In resonant
mode, the PWM outputs have a fixed duty cycle with variable
frequency.
PWM TIMING IN RESONANT MODE
With variable frequency control, OUTA and OUTB can only be
high during the first half of the switching cycle (t
OUTC and OUTD can only be high during the second half of
the switching cycle (t
frequency resolution of the control law is in steps of 10 ns.
PWM1 (OUTA)
PWM2 (OUTB)
PWM3 (OUTC)
PWM4 (OUTD)
ADP1046
Figure 60. OUTA, OUTB, OUTC, and OUTD PWM Timing Diagram
Q
Q
A
D
t
A
ADP1046
supports control of a resonant converter.
∆t
∆t
Q
Q
Figure 59. Series Resonant Converter
1
3
C
B
B
t
to t
PERIOD
I
R
t
to control a resonant switching con-
in Resonant Mode
B
C
C
∆t
∆t
R
), as shown in Figure 60. The
∆t
∆t
2
4
5
7
L
R
t
C
∆t
∆t
6
8
SR2
SR1
t
PERIOD
A
I
O
to t
C
O
B
), whereas
R
L
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SYNCHRONOUS RECTIFICATION IN RESONANT
MODE
Control of the synchronous rectifiers in a resonant controller is
a complicated issue. The
used to control the SR signals. In resonant mode operation, the
SR1 output is driven by the rising edge of the ACSNS comparator,
and the SR2 output is driven by the falling edge of the comparator,
as shown in Figure 61.
Following is an example of how the
series resonant topology and also achieve control of the synchro-
nous rectifiers. The V
used to control the SR signals. The ACSNS pin is connected to
the divided-down SR2 V
information for both synchronous rectifiers (see Figure 62).
After the timing information is obtained, SR1 is driven by the
rising edge of the ACSNS comparator, and SR2 is driven by the
falling edge of the comparator, as shown in Figure 61. In this
way, it is possible to achieve synchronous rectification. Turn-on
and turn-off delays can be programmed for the SR1 and SR2
signals individually.
This example is not the only way to control the SR signals. If the
user has another method to control the SR signals, this method
can be used to connect to the ACSNS input instead of the V
voltage of SR2.
When the
recommended that SR soft start be disabled during soft start of
the device (set Register 0x0F[7] = 1).
SYNC RECT 1 (SR1)
SYNC RECT 2 (SR2)
Figure 61. SR1 and SR2 PWM Timing Diagram in Resonant Mode
I
R
Figure 62. Resonant Synchronous Rectifier Control Circuit
C
R
ADP1046
V
ACSNS
DS
L
(SR2)
R
t
D
∆t
is used to control a resonant converter, it is
DS
9
voltage of SR2 (see Figure 61) can be
DS
ADP1046
voltage. This provides the timing
t
E
∆t
SR2
SR1
∆t
10
11
ACSNS comparator can be
C
ADP1046
I
O
O
t
F
∆t
R
12
L
R
R
1
2
can be used in a
ADP1046
ACSNS
DS