HYB18L256169BF QIMONDA [Qimonda AG], HYB18L256169BF Datasheet - Page 18

• Manufacturer Part Number: HYB18L256169BF
• Description: 256-Mbit Mobile-RAM
• Manufacturer: QIMONDA [Qimonda AG]

Table 10
Parameter
Access time from CLK
DQ low-impedance time from CLK
DQ high-impedance time from CLK
Data out hold time
DQM to DQ High-Z delay (READ Commands)
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
ACTIVE to PRECHARGE command period
PRECHARGE command period
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
During READ bursts, the valid data-out element from the starting column address is available following the CAS
latency after the READ command. Each subsequent data-out element is valid nominally at the next positive clock
edge. Upon completion of a READ burst, assuming no other READ command has been initiated, the DQs go to
High-Z state.
Figure 13
Figure 13
Data Sheet
no. of clock cycles = specified delay / clock period; round up to next integer.
and
Timing Parameters for READ
Single READ Burst (CAS Latency = 2)
Figure 14
show single READ bursts for each supported CAS latency setting.
CL = 3
CL = 2
Symbol
t
t
t
t
t
t
t
t
RCD
t
t
DQZ
RAS
18
OH
RC
AC
AC
HZ
RP
LZ
min.
1.0
3.0
2.5
67
19
45
19
–
–
–
- 7.5
HY[B/E]18L256169BF-7.5
max.
100k
5.4
6.0
7.0
–
–
2
–
–
–
256-Mbit Mobile-RAM
Functional Description
02032006-MP0M-7FQG
Rev. 1.02, 2006-12
Units
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
CK
Notes
–
–
–
–
1)
1)
1)
1)