HYB18L256169BF QIMONDA [Qimonda AG], HYB18L256169BF Datasheet - Page 16

• Manufacturer Part Number: HYB18L256169BF
• Description: 256-Mbit Mobile-RAM
• Manufacturer: QIMONDA [Qimonda AG]

2.4.4
Figure 9
Figure 10
Table 9
Parameter
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
ACTIVE bank A to ACTIVE bank B delay
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
Data Sheet
no. of clock cycles = specified delay / clock period; round up to next integer.
ACTIVE
ACTIVE Command
Bank Activate Timings
Timing Parameters for ACTIVE Command
Symbol
t
t
t
RCD
RRD
16
RC
Before any READ or WRITE commands can be issued
to a bank within the Mobile-RAM, a row in that bank
must be “opened” (activated). This is accomplished via
the ACTIVE command and addresses A0 - A12, BA0
and BA1 (see
the bank and the row to be activated. After opening a
row (issuing an ACTIVE command), a READ or WRITE
command may be issued to that row, subject to the
specification. A subsequent ACTIVE command to a
different row in the same bank can only be issued after
the
(precharged).
The minimum time interval between successive
ACTIVE commands to the same bank is defined by
A subsequent ACTIVE command to another bank can
be issued while the first bank is being accessed, which
results in a reduction of total row-access overhead. The
minimum time interval between successive ACTIVE
commands to different banks is defined by
previous
min.
67
19
15
Figure
- 7.5
active
9), which decode and select both
HY[B/E]18L256169BF-7.5
max.
row
–
–
–
256-Mbit Mobile-RAM
Functional Description
02032006-MP0M-7FQG
has
Rev. 1.02, 2006-12
Units
been
ns
ns
ns
t
RRD
“closed”
Notes
.
1)
1)
1)
t
t
RCD
RC
.