HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 227

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Port 1 Data Register (P1DR)
P1DR is an 8-bit readable/writable register that stores output data for the port 1 pins (P1
P1DR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Port 1 Register (PORT1)
PORT1 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port 1 pins (P1
If a port 1 read is performed while P1DDR bits are set to 1, the P1DR values are read. If a port 1
read is performed while P1DDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORT1 contents are determined by the pin
states, as P1DDR and P1DR are initialized. PORT1 retains its prior state after a manual reset, and
in software standby mode.
8.2.3
Port 1 pins also function as TPU I/O pins (TCLKA, TCLKB, TCLKC, TCLKD, TIOCA0,
TIOCB0, TIOCC0, TIOCD0, TIOCA1, TIOCB1, TIOCA2, and TIOCB2) and address output pins
(A
210
Bit
Initial value
R/W
Bit
Initial value
R/W
Note: * Determined by state of pins P1
23
Modes 4 to 6*
The corresponding port 1 pins are address outputs when P13DDR to P10DDR are set to 1, and
input ports when cleared to 0.
The corresponding port 1 pins are output ports when P17DDR to P14DDR are set to 1, and
input ports when cleared to 0.
to A
20
Pin Functions
). Port 1 pin functions are shown in table 8.3.
:
:
:
:
:
:
P17DR
R/W
P17
—*
R
7
0
7
P16DR
R/W
P16
—*
R
6
0
6
7
to P1
P15DR
7
R/W
P15
0
—*
) must always be performed on P1DR.
R
to P1
5
0
5
0
.
P14DR
R/W
P14
—*
R
4
0
4
P13DR
R/W
P13
—*
R
3
0
3
P12DR
R/W
P12
—*
R
2
0
2
P11DR
R/W
P11
—*
R
1
0
1
7
P10DR
to P1
R/W
P10
—*
R
0
0
0
0
).