HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 210

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

7.3.7
In block transfer mode, one operation transfers one block of data.
The block size is 1 to 256. When the transfer of one block ends, the initial state of the block size
counter and the address register specified as the block area is restored. The other address register
is then incremented, decremented, or left fixed.
From 1 to 65,536 transfers can be specified. Once the specified number of transfers have ended, a
CPU interrupt is requested.
Table 7.7 lists the register information in block transfer mode and figure 7.8 shows memory
mapping in block transfer mode.
Table 7.7
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
192
Block Transfer Mode
Register Information in Block Transfer Mode
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Function
Designates transfer source address
Designates destination address
Holds block size
Designates block size count
Transfer count