MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 154

• Manufacturer Part Number: MC68HC908JK3
• Description: MC68HC908JK1
• Manufacturer: MOTOROLA [Motorola, Inc]

I/O Ports
Technical Data
154
NOTE:
DDRB[7:0] — Data Direction Register B Bits
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
the port B I/O logic.
When DDRBx is a logic 1, reading address $0001 reads the Hotbox data
latch. When DDRBx is a logic 0, reading address $0001 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
of the port B pins.
DDRB Bit
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect the input.
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
0
1
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
PTB Bit
X
X
(1)
Table 12-2. Port B Pin Functions
Figure 12-8. Port B I/O Circuit
I/O Ports
RESET
I/O Pin Mode
Input, Hi-Z
Output
(2)
DDRBx
PTBx
Table
Accesses to DDRB
DDRB7-DDRB0
DDRB7-DDRB0
Read/Write
12-2summarizes the operation
MC68H(R)C908JL3
To Analog-To-Digital Converter
Figure 12-8
Read
Accesses to PTB
Pin
Pin
MOTOROLA
PTB[7:0]
PTB[7:0]
—
shows
Write
Rev. 1.0
PTBx
(3)