MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 134

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MC68HC908JK3

Manufacturer Part Number
MC68HC908JK3
Description
MC68HC908JK1
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Timer Interface Module (TIM)
Technical Data
134
NOTE:
NOTE:
Before enabling a TIM channel register for input capture operation, make
sure that the TCHx pin is stable for at least two bus clocks.
TOVx — Toggle-On-Overflow Bit
When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
MSxB
When channel x is an output compare channel, this read/write bit
controls the behavior of the channel x output when the TIM counter
overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
When the TOVx bit is at logic zero, setting the CHxMAX bit forces the
duty cycle of buffered and unbuffered PWM signals to 100%. As
Figure 10-8
is set or cleared. The output stays at the 100% duty cycle level until
the cycle after CHxMAX is cleared.
X
X
0
0
0
0
0
0
1
1
1
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
MSxA
X
X
X
0
1
0
0
0
1
1
1
Timer Interface Module (TIM)
Table 10-3. Mode, Edge, and Level Selection
shows, the CHxMAX bit takes effect in the cycle after it
ELSxB
0
0
0
1
1
0
1
1
0
1
1
ELSxA
0
0
1
0
1
1
0
1
1
0
1
Compare or
Compare
Capture
or PWM
Buffered
Buffered
Output
Output
Mode
Preset
Output
PWM
Input
Pin under Port Control;
Initial Output Level High
Pin under Port Control;
Initial Output Level Low
Capture on Rising Edge Only
Capture on Falling Edge Only
Capture on Rising or Falling Edge
Toggle Output on Compare
Clear Output on Compare
Set Output on Compare
Toggle Output on Compare
Clear Output on Compare
Set Output on Compare
MC68H(R)C908JL3
Configuration
MOTOROLA
Rev. 1.0

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