MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 127

• Manufacturer Part Number: MC68HC908JK3
• Description: MC68HC908JK1
• Manufacturer: MOTOROLA [Motorola, Inc]

10.10 I/O Registers
10.10.1 TIM Status and Control Register (TSC)
MC68H(R)C908JL3
MOTOROLA
—
Rev. 1.0
Address:
The following I/O registers control and monitor operation of the TIM:
The TIM status and control register does the following:
TOF — TIM Overflow Flag Bit
Reset:
Read:
Write:
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This read/write flag is set when the TIM counter resets to $0000 after
reaching the modulo value programmed in the TIM counter modulo
registers. Clear TOF by reading the TIM status and control register
when TOF is set and then writing a logic zero to TOF. If another TIM
TIM status and control register (TSC)
TIM control registers (TCNTH:TCNTL)
TIM counter modulo registers (TMODH:TMODL)
TIM channel status and control registers (TSC0 and TSC1)
TIM channel registers (TCH0H:TCH0L and TCH1H:TCH1L)
Enables TIM overflow interrupts
Flags TIM overflows
Stops the TIM counter
Resets the TIM counter
Prescales the TIM counter clock
Figure 10-4. TIM Status and Control Register (TSC)
$0020
Bit 7
TOF
0
0
Timer Interface Module (TIM)
= Unimplemented
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
3
0
0
Timer Interface Module (TIM)
PS2
2
0
PS1
1
0
Technical Data
I/O Registers
Bit 0
PS0
0
127