MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 80

• Manufacturer Part Number: MC68HC711G5
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

6.4.7
This is a shared register which acts as the output compare OC7 register or as the input capture IC6
register depending on the state of the I6/O7 bit in the TCTL4 register. This register is associated with
timer counter 2 and with Port J, bit 2.
READ:
WRITE:
RESET:
There are both input control bits and output control bits associated with these functions. Only the bits
associated with the selected function (input or output) will affect the operation of the timer channel.
6.4.8
READ:
WRITE:
RESET:
OC1M is used to specify which bits of Port A (I/O and timer port) are to be affected as a result of a
successful OC1 compare. The bits of OC1M correspond bit-for-bit with the bits of Port A. For each
bit to be affected by the successful OC1 compare, the corresponding bit in OC1M must be set to one.
Each Port A line associated with an OC1Mx bit which is set to one will be forced to be an output
regardless of the state of the associated DDRA bit. This does not change the state of the DDRA bit.
MOTOROLA
6-10
Output Compare 7/Input Capture 6 Register (TO7I6)
Output Compare 1 Action Mask Register (OC1M)
RESET:
RESET:
Any time.
Any time this register is configured for OC operation.
$FFFF
Any time (bits 2 through 0 always return 0).
Any time (writes to bits 2 through 0 have no meaning or effect).
$00 (OC1 disconnected from Port A logic).
$100C
$1056
$1057
OC1M7
BIT15
BIT7
7
0
0
7
0
OC1M6 OC1M5 OC1M4 OC1M3
BIT14
BIT6
6
0
0
6
0
BIT13
BIT5
PROGRAMMABLE TIMER
5
0
0
5
0
BIT12
BIT4
4
0
0
4
0
BIT11
BIT3
3
0
0
3
0
BIT10
BIT2
2
0
0
2
0
0
BIT9
BIT1
1
0
0
1
0
0
BIT8
BIT0
0
0
0
0
0
0
TO7I6
OC1M
MC68HC11G5