MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 81
MC68HC711G5
Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC711G5.pdf
(195 pages)
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MC68HC11G5
6.4.9
READ:
WRITE:
RESET:
OC1D is used to specify the data to be written to the affected bits of Port A as the result of
a successful OC1 compare. The bits of OC1D correspond bit-for-bit with the bits of Port A
(bits 3 – 7). When a successful OC1 compare occurs, for each bit that is set in OC1M, the
corresponding data bit in OC1D is written to the corresponding bit of Port A. If there is a
conflicting situation where an OC1 compare and another output compare function occur
during the same E-clock cycle, and both attempt to alter the same Port A bit, the OC1 action
will take priority.
One reason for providing this special capability on OC1 is to allow control of multiple I/O pins
automatically with a single output compare function. For example, if the OC2 and OC3 functions are
being used for internal timing functions, their associated Port A pins are free to be used for other
purposes. These two pins could be controlled simultaneously as high speed timed outputs using the
OC1 function by setting the two corresponding bits in the OC1M register to one.
The special I/O pin control on the OC1 function also allows more than one output compare function
to control a single I/O pin. For example, the OC1 function could be configured to affect only bit 3 of
Port A (by setting OC1M = $08). The OC5 function could set Port A bit 3 to a logic one and the OC1
function could reset it to a logic low on the very next count of the free-running counter.
6.4.10 Compare Force Register (CFORC)
READ:
WRITE:
RESET:
FOC1 to FOC7 — Force Output Compare “x” Action
Output Compare 1 Action Data Register (OC1D)
RESET:
RESET:
Any time (bits 2 – 0 always return 0).
Any time (writes to bits 2 – 0 have no meaning or effect).
$00
Any time but will always return $00 (1 state is transient).
Any time (writes to bit 0 have no meaning or effect).
$00 (no actions forced).
Writing a one to bit “x” in this register causes the action which is programmed for output
compare “x” to occur at the next transition of the prescaled timer clock. The action taken
is the same as if a successful comparison had just taken place with the TOCx register,
with the exception that the interrupt flag is not set.
$100B
$100D
OC1D7
FOC1
7
0
7
0
FOC2
OC1D6 OC1D5 OC1D4 OC1D3
6
0
6
0
FOC3
5
0
PROGRAMMABLE TIMER
5
0
FOC4
4
0
4
0
FOC5
3
0
3
0
FOC6
2
0
2
0
0
FOC7
1
0
1
0
0
0
0
0
0
0
CFORC
OC1D
MOTOROLA
6-11
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