MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 105

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MC68HC711G5

Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC11G5
This section contains a description of the serial peripheral interface (SPI).
The SPI is a synchronous interface which allows several SPI microcontrollers or SPI-type
peripherals to be interconnected. In a serial peripheral interface, separate wires (signals) are
required for data and clock. In the SPI format, the clock is not included in the data stream and must
be furnished as a separate signal. The MC68HC11G5 SPI system may be configured either as a
master or as a slave.
Features include:
The SPI interface consists of four Port D lines (MISO, MOSI, SCK, and SS). These signals are
discussed in the following paragraphs for both master mode and slave mode of operation.
Any SPI output line has to have its corresponding data direction register bit set. If this bit is clear,
the line is disconnected from the SPI logic and becomes a general-purpose input line. Any SPI
input line is forced to act as an input regardless of the state of the corresponding data direction
register bit.
8.1
8.2
Full-duplex, 3-wire synchronous transfers
Master or slave operation
1.05 MHz (maximum) master bit frequency
2.1 MHz (maximum) slave bit frequency
Four programmable master bit rates
Programmable clock polarity and phase
End-of-transmission interrupt flag
Write collision flag protection
Master-master mode fault protection
Easy interface to simple expansion parts (PLLs, D/As, latches, display drivers, etc.)
OVERVIEW AND FEATURES
SPI SIGNAL DESCRIPTIONS
SERIAL PERIPHERAL INTERFACE
SERIAL PERIPHERAL INTERFACE
SECTION 8
MOTOROLA
8-1

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