LAN9118_05 SMSC [SMSC Corporation], LAN9118_05 Datasheet - Page 91

• Manufacturer Part Number: LAN9118_05
• Description: High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
• Manufacturer: SMSC [SMSC Corporation]

High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9118
5.3.24
5.4
BITS
BITS
31-8
7-0
7:0
9
8
DESCRIPTION
EPC Time-out.
response from the EEPROM within 30mS, the EEPROM controller will time-
out and return to its idle state. This bit is set when a time-out occurs
indicating that the last operation was unsuccessful.
Note:
MAC Address Loaded.
was found, and that the MAC address programming has completed
normally. This bit is set after a successful load of the MAC address after
power-up, or after a RELOAD command has completed
EPC Address.
Controller to address the specific memory location in the Serial EEPROM.
This is a Byte aligned address.
DESCRIPTION
Reserved.
EEPROM Data. Value read from or written to the EEPROM.
E2P_DATA – EEPROM Data Register
This register is used in conjunction with the E2P_CMD register to perform read and write operations
with the Serial EEPROM
These registers are located in the MAC module and are accessed indirectly through the MAC-CSR
synchronizer port.
that are accessible through the indexing method using the MAC_CSR_CMD and MAC_CSR_DATA
registers (see sections MAC_CSR_CMD – MAC CSR Synchronizer Command Register and
MAC_CSR_DATA – MAC CSR Synchronizer Data Register).
MAC Control and Status Registers
Offset:
If the EEDIO signal pin is externally pulled-high, EPC commands
will not time out if the EEPROM device is missing. In this case the
EPC Busy bit will be cleared as soon as the command sequence
is complete. It should also be noted that the ERASE, ERAL,
WRITE and WRAL commands are the only EPC commands that
will time-out if an EEPROM device is not present -and- the EEDIO
signal is pulled low
The 8-bit value in this field is used by the EEPROM
If an EEPROM operation is performed, and there is no
Table 5.6, "LAN9118 MAC CSR Register
When set, this bit indicates that a valid EEPROM
B4h
DATASHEET
91
Size:
Map", shown below, lists the MAC registers
32 bits
R/WC
TYPE
TYPE
R/W
R/W
RO
RO
Revision 1.1 (05-17-05)
DEFAULT
DEFAULT
00h
00h
0
-
-