MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 69

• Manufacturer Part Number: MC68HC705V12CFN
• Description: The Motorola microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

5.4 Internal Resets
5.4.1 Power-On Reset (POR)
MC68HC705V12
MOTOROLA
—
Rev. 3.0
asserted. When the external RESET pin is asserted, the pulldown device
will be turned on for only the three to four internal clock cycles.
The five internally generated resets are:
All internal resets will also assert (pull to logic 0) the external RESET pin
for the duration of the reset or three to four internal clock cycles,
whichever is longer.
The internal POR is generated on power-up to allow the clock oscillator
to stabilize. The POR is strictly for power turn-on conditions and is not
able to detect a drop in the power supply voltage (brown-out). There is
an oscillator stabilization delay of 4064 internal processor bus clock
cycles (PH2) after the oscillator becomes active.
The POR will generate the RST signal which will reset the CPU. If any
other reset function is active at the end of this 4064-cycle delay, the RST
signal will remain in the reset condition until the other reset condition(s)
end.
POR will activate the RESET pin pulldown device connected to the pin.
V
rise of V
DD
•
•
•
•
•
must drop below V
Initial power-on reset (POR) function
Computer operating properly reset (COPR)
Illegal address detector
Low-voltage reset (LVR)
Disabled STOP instruction
DD
.
Resets
POR
for the internal POR circuit to detect the next
Advance Information
Internal Resets
Resets
69