MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 133

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MC68HC705V12CFN

Manufacturer Part Number
MC68HC705V12CFN
Description
The Motorola microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
13.4 Digital Section
13.4.1 Conversion Times
13.4.2 Internal and Master Oscillators
13.4.3 Multi-Channel Operation
MC68HC705V12
MOTOROLA
Rev. 3.0
This subsection describes the digital section.
Each channel of conversion takes 32 clock cycles, which must be at a
frequency equal to or greater than 1 MHz.
If the MCU bus (f
oscillator (nominally 1.5 MHz) must be used for the A/D conversion
clock. This selection is made by setting the ADRC bit in the A/D status
and control registers to 1. In stop mode, the internal RC oscillator is
turned off automatically, although the A/D subsystem remains enabled
(ADON remains set). In wait mode the A/D subsystem remains
functional. See
When the internal RC oscillator is being used as the conversion clock,
three limitations apply:
A multiplexer allows the A/D converter to select one of five external
analog signals and four internal reference sources.
1. The conversion complete flag (COCO) must be used to determine
2. The conversion process runs at the nominal 1.5 MHz rate, but the
3. If the system clock is running faster than the RC oscillator, the RC
when a conversion sequence has been completed, due to the
frequency tolerance of the RC oscillator and its asynchronism with
regard to the MCU bus clock.
conversion results must be transferred to the MCU result registers
synchronously with the MCU bus clock so conversion time is
limited to a maximum of one channel per bus cycle.
oscillator should be turned off and the system clock used as the
conversion clock.
Analog-to-Digital (A/D) Converter
13.7 A/D during Wait
OP
) frequency is less than 1.0 MHz, an internal RC
Mode.
Analog-to-Digital (A/D) Converter
Advance Information
Digital Section
133

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