PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 393
PIC18F23K20-E/MLQTP
Manufacturer Part Number
PIC18F23K20-E/MLQTP
Description
28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F23K20-EMLQTP.pdf
(420 pages)
- Current page: 393 of 420
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FIGURE 26-21:
TABLE 26-25: A/D CONVERSION REQUIREMENTS
© 2007 Microchip Technology Inc.
130
131
132
135
TBD
Legend: TBD = To Be Determined
Note 1:
Param
No.
2:
3:
4:
A/D DATA
Note 1:
SAMPLE
A/D CLK
T
T
T
T
T
ADRES
Symbol
BSF ADCON0, GO
AD
CNV
ACQ
SWC
DIS
ADIF
The time of the A/D clock period is dependent on the device frequency and the T
ADRES register may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
Ω.
On the following cycle of the device clock.
GO
2:
Q4
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
A/D Clock Period
Conversion Time
(not including acquisition time) (Note 2)
Acquisition Time (Note 3)
Switching Time from Convert → Sample
Discharge Time
132
A/D CONVERSION TIMING
(Note 2)
Characteristic
DD
9
to V
SS
8
Advance Information
or V
OLD_DATA
SS
7
to V
.. .
SAMPLING STOPPED
DD
CY
). The source impedance (R
CY
is added before the A/D clock starts.
cycle.
. . .
131
130
PIC18F2XK20/4XK20
TBD
TBD
Min
0.7
1.4
0.2
11
—
2
(Note 4)
25.0
Max
12
—
—
—
1
(1)
1
Units
T
μs
μs
μs
μs
μs
AD
S
) on the input channels is 50
0
T
A/D RC mode
-40°C to +85°C
0°C ≤ to ≤ +85°C
OSC
AD
based, V
clock divider.
NEW_DATA
DONE
Conditions
DS41303B-page 391
T
CY
REF
≥ 3.0V
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